A computer screen is composed of tens or hundreds of thousands or even millions of tiny dots. The smallest element on a video display is called a pixel, which comprises one or more dots that are treated as a unit. A pixel can be one dot on a monochrome screen, or three dots (red, green, and blue, or RGB) on color screens, or clusters of these dots. The number of bits assigned to each pixel in its associated digital memory determines the number of gray scales (or shades) and colors (including chrominance and lumance) that can be represented. A monochrome, in which one bit per pixel is all that is required (on or off), is the most economic system. A color display, on the other hand, can use up to four bytes for each of the red, green, and blue dots to display millions or even billions of different shades. Most of the color displays that are most widely used today belong to the so-called high-resolution displays, for which many megabytes of memory would have to be reserved to hold a graphic image.
Conventionally, a two-dimensional addressing is used to relate the pixel position in the screen to its corresponding address in the display memory (or video memory). This provides a convenient and exact correspondence between the pixel position in the video display and the memory address in the display memory. For example, a screen position at (X, Y) (i.e., Xth pixel position in the Yth scan line, counting from left to fight and from top to bottom) has an identical memory address of (X, Y) in the video memory. Because commercial memory chips are provided in the units of 2.sup.n, the conventional two-dimensional pixel image addressing system can result in substantial inefficiency in the video memory. For example, with a 512.times.512=256K memory chip, a video display with a resolution of 1152.times.900 will require 6 (1536/512.times.1024/512) memory chips. The memory usage efficiency is therefore (1152.times.900)/(1536.times.1024)=65.9%.
In order to improve the memory usage efficiency, a linear addressing system can be provided to store the pixel positions of a screen image. With a linear addressing, the positions of the two-dimensional screen pixels are stored in a sequential and continuous manner. A linear addressing can substantially improve the memory usage efficiency and thus reduce the number of memory chips required to store video images. Using the previous case as an example, with a video display having a resolution of 1152.times.900, the number of memory chips required is (1024/512).times.(1024/512)=4. The memory usage efficiency is thus calculated to be (1152.times.900)/(1024.times.1024)=98.9%.
Comparing the above two examples, the memory usage efficiency is 98.9% for a linear addressing versus 65.9% for a two-dimensional addressing. Thus, significant savings in the memory chips can be realized using a linear addressing system.
Using the previous video display, which has a resolution of 1152.times.900, as an example, a pixel with a screen position of (X, Y) corresponds to a linear address of:
Linear address=1152.times.Y+X Although linear memory addressing increases the memory usage efficiency, it requires additional hardware and/or software effort to calculate the linear address from a two-dimensional input data. Conventional 2-D-to-linear converters require data processing by the central processing unit (CPU) of the system. This not only subjects the video display to the clock rate of the system CPU, it could also slow down the overall performance of the system. To faciliate the high processing speed and ease of operation, it therefore is desirable to provide a device which can perform the required conversions independent of the CPU, allow a high-speed conversion, and require very simple construction with a minimum hardware implementation including a minimum number of gates so as to minimize the production cost. Furthermore, it is desirable that the device so developed can be flexibly used for a wide range of video display screens of various resolutions.